Design Of High Speed ALU Using Vedic Mathematics For Floating And Fixed Point Integers



In this paper, we present a contrast and also study of numerous adders. Adder's circuit is important for making numerous electronic systems. The Intricacy in VLSI design boosts when the level of combination rises. In this paper, Adder is designed making use of a various method which is based upon MUX based adder; pass transistor, as well as reasoning 2-T logic. The efficiency of the system relies on the efficiency of interior components that are shown in the system. Here, the internal elements should be created in such manner in which, they must take in less power with minimal dead time. The recommended circuit is much better than the existing method concerning area and also hold-up. In several high-performance computing systems such as Digital Signal processors, FIR filters, Microprocessors, and also Microcontrollers, the Multipliers are the key parts where the adders are the standard foundation. The layout as well as the implementation of various 32-bit adders likes Ripple Carry Adder (RCA), Carry Increment adder (CINA) and Lug bypass adder (CBYA) for various full adder cells is done using the Verilog HDL. The outcomes are obtained by implementing Verilog code in Xilinx 14.5 ISE for the Spartan 3E household device with rate quality -5.


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